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Like signal traces, vias introduce inductance and capacitance to the circuit. In signals with lower frequencies, such characteristics are often negligible. However, placing vias on high-speed traces can alter the impedance and affect signal integrity. It’s advisable to avoid using vias on high-speed signals.

How to pay attention to signal degradation of PCB via?

You’ll also need to be wary of via stub, where a portion of the drilled via is unused. Via stubs exist when signals are routed from an outer layer to the middle layer, leaving the remaining section acting as an antenna. Via stubs may degrade the signal traveling on the trace itself. To prevent via stubs, back drilling is performed to remove the unused copper section on the via.

How to plate vias on PCB?

It is often desirable to perform additional treatments to the vias later in the production sequence to improve either thermal performance or assembly yield. These may include epoxy hole filling, secondary solder masking, or some combination of the two.

These additional process steps are most often intended to eliminate assembly issues such as solder shorting between a component pad to a via pad or solder migrating down through the barrel of a via which has been drilled into a component soldering land. These problems lead to costly troubleshooting and rework. Fortunately, it is possible to eliminate most issues by specifying an appropriate via treatment.

Tented vias have a non-conductive solder mask covering over the pad at both ends of the hole. Tenting was popular when dry film solder mask was in its prime, because dry film’s 0.004” thickness enabled it to tent even relatively large holes very reliably without much chance of breakdown. Today however, dry film mask is no longer used since its height causes difficulty with modern surface mount soldering.

What are the limitations for multilayer PCB?

Underwriter laboratories say that for supreme quality and reliability, you should not produce PCBs that need over three lamination steps. It means that you should not design vias such that they need more than three steps for assembly. This issue arises when you are dealing with PCBs having more than six layers.

Figure 4 shows an example of a 10-layer PCB that would need two lamination steps. The first step, drill the buried holes and electroplate them from layers 3 to 8. In the second step, drill the blind holes and electroplate them on their layers and then laminate the rest of the layers. In the end, drill the through-hole vias and electroplate them, but this is not a lamination step. Hence, this PCB board only requires two lamination steps and three drilling steps.

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