Instead of a calm and picturesque lake, the supply of power in a circuit board can be a stormy nightmare filled with ripples and waves threatening to swamp a little boat. The components necessary for high-speed circuits demand a lot of power, creating spikes that threaten the smooth operation of other parts on the board. For the best performance of a circuit board, the integrity of these waters must be managed so that the board has an even and continual supply of power for all of its needs. Here are some power integrity fundamentals that can help you calm the storms of the power delivery network in your design.
Circuit Board Problems Due to Flawed Power Integrity
At one time, circuit board components were simple enough that many only had one power and one ground pin on them. These devices were really easy to work with, especially the thru-hole versions, as they easily connected to the VCC and ground planes of the board. Even their bypass capacitors were simple to place and route, as they nestled right on top of the part where they could easily be routed to pin 14 of the IC. Additionally, these parts were not as sensitive to minor fluctuations in the power delivery network, and their signal speeds were not fast enough to create problems either. But, with the components used in high-speed designs today, this has all changed dramatically.
The power delivery networks (PDNs) of circuit boards have to be carefully managed to provide clean power across the PCB to all of its components. A board that hasn’t been designed for good power integrity can exhibit a lot of problems, such as power ripples that create crosstalk in the high-speed circuits of the board. We’ll look further at the different types of problems bad power integrity can create for circuit boards, but first, let’s look at the results of these problems:
Excessive noise in a PDN will affect the voltage levels required by components, and if they drop below the acceptable level, the associated circuits may malfunction. Even if the voltages are within the tolerance required by the part, the noise on the PDN may appear as crosstalk on signals, causing those signals to be misinterpreted. PDN noise has the potential of radiating EMI through the planes and connections of the power delivery network. All of the above can create a huge headache for designers during test and debugging. Obviously, good power integrity in PCB design is essential to the success of the design, so, let’s explore some power integrity fundamentals.
Notable Power Integrity Fundamentals
Good power integrity in a circuit board means that its power delivery network is designed to provide stable voltage references and to distribute power to all of the board components within acceptable noise and tolerance levels. The PDN has to be able to distribute power evenly throughout the system—from the power supply to associated routing and vias, through the planes and capacitors, and finally into individual devices. Each device on the board needs strictly controlled and consistent voltages supplied to it for consistent and stable operation. Some of these devices, such as large pin-count processors, require several different voltages and higher amperage than other parts to run. The demands of these components have to be managed by the PDN or they will adversely affect other components on the board. Here are some of the specific power integrity problems designers need to consider when they design PDNs.
With the increased switching rates in high-speed designs, the low state of a signal may not return all the way back to the reference ground level. This ground bounce is also known as simultaneous switching noise or SSN. As the low state of the signal drifts upwards, it may eventually be misinterpreted as a high state, leading to false data being transmitted.
The switching of an SMPS (switched-mode power supply) can cause power ripples to spread out through the design. These ripples could potentially create crosstalk, overwhelming and disrupting the operation of nearby circuits.
The switching of an SMPS between its on and off states can create EMI if not designed correctly. Not only will EMI affect the smooth operation of the circuitry on the board, but it can also interfere with external electronics. EMI is also closely associated with how the power and ground planes of the board are configured. Not only do these planes conduct power and ground for the PDN, but they also serve as an effective shield against EMI. How the planes are configured must take shielding into consideration as well.
Signal Return Paths
Although clear signal return paths are part of creating good signal integrity, reference planes are part of the board’s PDN system and must be considered when designing for power integrity. High-density parts will have a number of vias for signals and connections to power and ground, but these vias can block the clear return paths on the reference plane. Also, some power requirements may lead designers to split a plane, as in the picture below. However, those splits may impact the clear return path of high-speed signals—creating even more EMI—and must be designed carefully.
Now that we’ve seen some basic power integrity problems, let’s look at the PCB layout best practices and power integrity fundamentals that will help prevent them.